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july 2006 rev 5 1/11 11 lcp1521s/lcp152dee asd (application specific devices) programmable transient voltage suppressor for slic protection features dual programmable transient suppressor wide negative firing voltage range: v mgl = -150 v max. low dynamic switching voltages: v fp and v dgl low gate triggering current: i gt = 5 ma max peak pulse current: i pp = 30 a (10/1000 s) holding current: i h = 150 ma min low space consuming package description these devices have been especially designed to protect new high voltage, as well as classical slics, against transient overvoltages. positive overvoltages are clamped by 2 diodes. negative surges are suppressed by 2 thyristors, their breakdown voltage being referenced to -v bat through the gate. these components present a very low gate triggering current (i gt ) in order to reduce the current consumption on printed circuit board during the firing phase. benefits trisils? are not subject to ageing and provide a fail safe mode in short circuit for a better level of protection. trisils are used to ensure equipment meets various standards such as ul60950, iec950 / csa c22.2, ul1459 and fcc part 68. trisils have ul94 v0 approved resin (trisils are ul497b approved [file: e136224]). tm: trisil is a trademar k of stmicroelectronics order codes figure 1. lcp1521s functional diagram figure 2. lcp152dee functional diagram part number marking lcp1521s cp152s lcp1521srl cp152s lcp152deerl lcp152 so-8 lcp1521s qfn 3x3 6 leads lcp152dee tip gate nc ring tip gnd ring gnd 1 tip tip gate gnd nc ring ring www.st.com
characteristics lcp1521s/lcp152dee 2/11 1 characteristics table 1. standards compliance standard peak surge voltage (v) voltag e waveform required peak current (a) current waveform minimum serial resistor to meet standard ( ? ) gr-1089 core first level 2500 1000 2/10 s 10/1000 s 500 100 2/10 s 10/1000 s 12 24 gr-1089 core second level 5000 2/10 s 500 2/10 s 24 gr-1089 core intra-building 1500 2/10 s 100 2/10 s 0 itu-t-k20/k21 6000 1500 10/700 s 150 37.5 5/310 s 110 0 itu-t-k20 (iec 61000-4-2) 8000 15000 1/60 ns esd contact discharge esd air discharge 0 0 vde0433 4000 2000 10/700 s 100 50 5/310 s 60 10 vde0878 4000 2000 1.2/50 s 100 50 1/20 s 0 0 iec61000-4-5 4000 4000 10/700 s 1.2/50 s 100 100 5/310 s 8/20 s 60 0 fcc part 68, lightning surge type a 1500 800 10/160 s 10/560 s 200 100 10/160 s 10/560 s 22.5 15 fcc part 68, lightning surge type b 1000 9/720 s 25 5/320 s 0 table 2. thermal resistances symbol parameter value unit r th(j-a) junction to ambient so-8 120 c/w qfn 140
lcp1521s/lcp152dee characteristics 3/11 table 3. electrical characteristics (t amb = 25 c) symbol parameter i gt gate triggering current i h holding current i rm reverse leakage current line / gnd i rg reverse leakage current gate / line v rm reverse voltage line / gnd v gt gate triggering voltage v f forward drop voltage line / gnd v fp peak forward voltage line / gnd v dgl dynamic switching voltage gate / line v rg reverse voltage gate / line c capacitance line / gnd table 4. absolute ratings (t amb = 25 c, unless otherwise specified) symbol parameter value unit i pp peak pulse current 10/1000 s 8/20 s 10/560 s 5/310 s 10/160 s 1/20 s 2/10 s 30 100 35 40 50 100 150 a i tsm non repetitive surge peak on-state current (50hz sinusoidal) t = 20 ms t = 200 ms t = 1 s 18 10 7 a i gsm maximum gate current (50hz sinusoidal) t = 10 ms 2 a v mlg v mgl maximum voltage line/gnd maximum voltage gate/line -40 c < tamb < +85 c -40 c < tamb < +85 c -150 -150 v t stg t j storage temperature range maximum junction temperature -55 to +150 150 c t l maximum lead temperature for soldering during 10 s. 260 c table 5. repetitive peak pulse current symbol definition example t r rise time (s) pulse waveform 10/1000 s: t r = 10 s t p = 1000 s t p pulse duration (s) v rm v r i pp i h i r i rm v f i v 100 50 %i pp t t t r p 0
characteristics lcp1521s/lcp152dee 4/11 table 6. parameters related to the diode line / gnd (t amb = 25 c) symbol test conditions max unit v f i f = 5a t = 500 s 3 v v fp (1) 1. see test circuit for v fp ( figure 4. ): r s is the protection resistor located on the line card. 10/700 s 1.2/50 s 2/10 s 1.5 kv 1.5 kv 2.5 kv r s = 10 ? r s = 10 ? r s = 62 ? 5 9 30 v table 7. parameters related to the protection thyristors (t amb = 25 c, unless otherwise specified) symbol test conditions typ max unit i gt v gnd / line = -48 v 0.1 5 ma i h v gate = -48 v (1) 1. see functional holding current (i h ) test circuit 150 ma v gt at i gt 2.5 v i rg v rg = -150 v v rg = -150 v t j = 25 c t j = 85 c 5 50 a v dgl v gate = -48 v (2) 2. see test circuit for v dg the oscillations with a time duration lower than 50ns are not taken into account. 10/700 s 1.2/50 s 2/10 s 1.5 kv 1.5 kv 2.5 kv r s = 10 ? r s = 10 ? r s = 62 ? i pp = 30 a i pp = 30 a i pp = 38 a 7 10 25 v table 8. parameters related to diode and protection thyristors (tamb = 25 c, unless otherwise specified) symbol test conditions typ max unit i rm v gate / line = -1 v v rm = -150 v vg at e / l i n e = -1 v v rm = -150 v t j = 25 c t j = 85 c 5 50 a c v r = 50 v bias, v rms = 1 v, f = 1 mhz v r = 2 v bias, v rms = 1 v, f = 1 mhz 15 35 pf
lcp1521s/lcp152dee characteristics 5/11 figure 3. functional holding current (i h ) test circuit: go-no go test figure 4. test circuit for v fp and v dgl parameters pulse (s) v p (v) c 1 (f) c 2 (nf) l (h) r 1 ( ? ) r 2 ( ? ) r 3 ( ? ) r 4 ( ? ) i pp (a) r s ( ? ) t r t p 107001500202000 501525253010 1.25015001 33 0 761325253010 2 10 2500 10 0 1.1 1.3 0 3 3 38 62 r v bat = - 100v surge generator d.u.t this is a go-no go test which allows to confirm the holding current (i ) level in a functional test circuit. - adjust the current level at the i value by short circuiting the d.u.t. - fire the d.u.t. with a surge current: i = 10a, 10/1000s - the d.u.t. will come back to the off-state within a duration of 50ms max. h h pp test procedure: cc r r tip ring gnd v p 4 3 2 r 2 r 1 (v is defined in unload condition) p l 1
technical information lcp1521s/lcp152dee 6/11 2 technical information figure 5. lcp152 concept behavior figure 5. shows the classical protection circuit using the lcp152 crowbar concept. this topology has been developed to protect the new high voltage slics. it allows to program the negative firing threshold while the positive clamping value is fixed at gnd. when a negative surge occurs on one wire (l1 for example) a current ig flows through the base of the transistor t1 and then injects a current in the gate of the thyristor th1. th1 fires and all the surge current flows through the ground. after the surge when the current flowing through th1 becomes less negative than the holding current ih, then th1 switches off. when a positive surge occurs on one wire (l1 for example) the diode d1 conducts and the surge current flows through the ground. figure 6. example of pcb layout based on lcp152s protection figure 6. shows the classical pcb layout used to optimize line protection. the capacitor c is used to speed up the crowbar structure firing during the fast surge edges. this allows to minimize the dynamical break over voltage at the slic tip and ring inputs during fast strikes. note that this capacitor is generally present around the slic - vbat pin. so to be efficient it has to be as close as possible from the lcp152 gate pin and from the reference ground track (or plan) (see figure 6. ). the optimized value for c is 220 nf. the series resitors rs1 and rs2 designed in figure 5. represent the fuse resistors or the ptc which are mandatory to withstand the power contact or the power induction tests v ring gnd gate tip ring gnd -vbat c rs1 rs2 l 1 l 2 v tip th1 d1 t1 ig id1 to line side 22 0 nf gnd to slic side lcp1521s
lcp1521s/lcp152dee technical information 7/11 imposed by the various country standards. taking into account this fact the actual lightning surge current flowing through the lcp is equal to: i surge = v surge / (r g + r s ) with: v surge = peak surge voltage imposed by the standard. r g = series resistor of the surge generator r s = series resistor of the line card (e.g. ptc) e.g. for a line card with 30 ? of series resistors which has to be qualified under gr1089 core 1000v 10/1000 s surge, the actual current through the lcp152 is equal to: i surge = 1000 / (10 + 30) = 25 a the lcp152 is particularly optimized for the new telecom applications such as the fiber in the loop, the wll, the remote central office. in this case, the operating voltages are smaller than in the classical system. this makes the high voltage slics particularly suitable. the schematics of figure 7. give the most frequent topology used for these applications. figure 7. protection of high voltage slic rs (*) = ptc or fuse resistor gate gnd gnd tip ring -vbat lcp152xx 220nf slic rs (*) rs (*) line line card tip ring gnd figure 8. surge peak current versus overload duration figure 9. relative variation of holding current versus junction temperature i (a) tsm 0 4 8 12 16 20 24 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t(s) f=50hz t j initial=25c -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 0.7 0.8 0.9 1 1.1 1.2 1.3 t (c) j i [t ] / i [t =25c] hj hj
package information lcp1521s/lcp152dee 8/11 3 package information figure 10. footprint (dimensions in mm) table 9. so-8 dimensions ref. dimensions millimeters inches min. typ. max. min. typ. max. a1.750.069 a1 0.1 0.25 0.004 0.010 a2 1.25 0.049 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.009 d 4.80 4.90 5.00 0.189 0.193 0.197 e 5.80 6.00 6.20 0.228 0.236 0.244 e1 3.80 3.90 4.00 0.150 0.154 0.157 e 1.27 0.050 h 0.25 0.50 0.010 0.020 l 0.40 1.27 0.016 0.050 l1 1.04 0.041 k0808 ccc 0.10 0.004 e1 d 8 4 1 5 e k h x 45 l l1 c (seating plane) 0.25mm (gage plane) e a a2 b a1 ccc c c
lcp1521s/lcp152dee package information 9/11 figure 11. qfn 3x3 6 leads footprint dimensions (in mm) table 10. qfn 3x3 6 leads package dimensions ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.80 1 0.031 0.040 a1 0 0.05 0 0.002 a2 0.65 0.75 0.026 0.030 a3 20 0.787 b 0.33 0.43 0.013 0.017 d 2.90 3 3.10 0.114 0.118 0.122 d2 1.92 2.12 0.076 0.083 e 2.90 3 3.10 0.114 0.118 0.122 e2 1.11 1.31 0.044 0.051 e 0.95 0.037 l 0.20 0.45 0.008 0.018 l1 0.24 0.009 l2 0.13 0.005 k 0.20 0.008 < 0 12 0 12 0.34 0.95 0.48 1.21 2.02 4.00 1.05 0.35
ordering information lcp1521s/lcp152dee 10/11 4 ordering information 5 revision history part number marking package weight base qty delivery mode lcp1521s cp152s so-8 0.11 g 100 tube lcp1521srl (1) 1. preferred device cp152s 2500 tape and reel lcp152deerl (1) lcp152 qfn 3x3 6l 0.022 g 3000 tape and reel date revision description of changes sep-2003 1a first issue. 08-dec-2004 2 1/ page 2 table 3: thermal resi stances changed from 130 c/w (so-8) to 120 c/w and from 170 c/w (qfn) to 140 c/w. 2/ so-8 and qfn footprint dimensions added. 17-feb-2005 3 table 9 on page 4: correction of typo on capacitance unit. 03-may-2005 4 table 5 on page 3: i tsm value @ t= 1s from 4 a to 4.5 a. 07-jul-2006 5 replaced qfn package illustration on page 1. reformatted document to current layout standard. values of i tsm modified in table 4. so-8 package dimensions updated in table 9.
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